New design framework to build next-gen analog chipsets
New design framework to build next-gen analog chipsets
New Delhi, July 06 (India Science Wire): Researchers at the Bengaluru-based Indian Institute
of Science (IISc) have developed a design framework to build next-generation analog
computing chipsets that promise to be faster and require less power than the digital chips
found in most electronic devices.
Using their new framework, the team has built a prototype of an analog chipset called
ARYABHAT-1 (short for Analog Reconfigurable technologY And Bias-scalable Hardware for AI
Tasks). The new chipset is expected to be especially helpful for Artificial Intelligence (AI)-
based applications like object or speech recognition such as Alexa or Siri or those that
require massive parallel computing operations at high speeds.
Presen...









